AI Chip-Layout Tool Has Helped Design Over 100 Chips.

Synopsys’ AI solution for semiconductor design has achieved the milestone of 100 commercial chip tape-outs. The company said in a press release that customers such as STMicroelectronics and SK hynix have enjoyed up to 3x productivity increases, seeing chips with up to 25% lower total power and significant reduction in die size thanks to Synopsys (Design Space Optimization AI).

To be clear, AI isn’t stealing chip designers’ jobs: Synopsys prefers to say that, thanks to its software, human chip designers and hardware engineers are freed from iterative work, and, thanks to AI augmentation, are able to instead work on innovation.

“With reduced design and verification cycles and effort, design teams can spend more of their time innovating on their core ideas,” Synopsys said. It hopes the engineering talent shortage can at least be somewhat relieved by AI.

The milestone achieved by Synopsys shows that AI use in electronic design automation is rapidly becoming mainstream. Moreover, this AI can be particularly useful to industrial sectors increasingly looking to enter the chip design business — auto makers, for example. Synopsys even goes so far as describing as an “expert engineer in a box.”

So, what exactly does Synopsys do? The biggest clue is in the acronym: Design Space Optimization — by AI. The tool takes care of the floor-planning for a new chip (or iterations of it). Synopsys says is a great fit for the trending multi-die silicon designs, which would involve a high volume of repetitive tasks for humans to plan.

To complete its task, the AI software optimizes power, performance, and area (PPA) for any given chip design space. Working on PPA is a proven route to doing better with fewer resources, and has been a very popular target for optimizing during recent years with shortages of key materials due to cryptocurrencies and the pandemic.

Synopsys customers have been reaping the benefits of with impressive results claimed.  Synopsys asserts that its customers have seen productivity boosts of more than 3x, power reductions of up to 15%, substantial die size reductions in finished designs, and reduced use of resources. It also suggests an ideal task for AI is facilitating multi-foundry strategies to mitigate the impact of supply chain vulnerabilities and to lower costs.

Synopsys is already looking at broadening the use of AI in other chip design and verification workflows. It seems we may be seeing a breakthrough moment in AI-based chip design, and it’s interesting to see this news as consumer-facing AIs from Google, Microsoft, and OpenAI are also making headlines.


Be In the Know

  ****THis article is reproduced in Tom’s Hardware by Mark Tyson

Post time: Mar-14-2023